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| 2525 AND 2535 USB POWER CONTROL SWITCHES A2525EM GATE CONTROL Data Sheet 27447.1 EN FLG GND NC 1 2 3 4 8 7 OUT IN NC NC The A2525EL/M and A2535EL/M are integrated high-side power switches, optimized for self-powered and bus-powered Universal Serial Bus (USB) applications. Few external components are necessary to satisfy USB requirements. The A2525EL/EM ENABLE inputs are active high; the A2535EL/EM are active low. All devices are ideally suited for USB applications. Each switch channel supplies up to 500 mA as required by USB peripheral devices. In addition, the switch's low on-resistance permits achieving the USB voltage-drop requirements. Fault current is limited to typically 750 mA, satisfying the UL 25 VA safety requirements, and a flag output is available to indicate a fault condition to the local USB controller. Momentary voltage drops that may occur on the upstream port when the switch is enabled in bus-powered applications is eliminated by a "soft start" feature. Additional features include thermal shutdown to prevent catastrophic switch failure from high-current loads, undervoltage lockout to ensure that the device remains OFF unless there is a valid input voltage present, and 3.3 V and 5 V logic-compatible enable inputs. These switches are provided in 8-pin mini-DIP (suffix `M') and 8-lead SOIC (suffix `L') packages. NC NC NC 6 5 Dwg. PP-070A Note that the A2525EM (DIP) and the A2525EL (SOIC) are electrically identical and share a common terminal number assignment. ADVANCE INFORMATION (subject to change without notice) August 2, 1999 ABSOLUTE MAXIMUM RATINGS Supply Voltage, VIN ..................... 6.0 V Output Voltage, VOUT ................... 6.0 V Output Current, IOUT ................. Internally Limited ENABLE Voltage Range, VEN ......................... -0.3 V to 10 V Fault Flag Voltage, VFLG .............. 8.0 V Fault Flag Current, IFLG ............. 50 mA Package Power Dissipation, PD ................................. See Graph Operating Temperature Range, TA ......................... -40C to +85C Junction Temperature, TJ ....... +150C* Storage Temperature Range, TS ........................... -65C to 150C * Fault conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. These conditions can be tolerated but should be avoided. Features s s s s s s s s s s s s s s s s s 2.7 V to 5.8 V Input Up to 500 mA Continuous Load Current 140 m Maximum ON-Resistance 1.25 A Maximum Short-Circuit Current Limit Individual Open-Drain Fault Flag Outputs 110 A Typical ON-State Supply Current 1 A Typical OFF-State Supply Current Outputs Can be Forced Higher Than Input (off-state) Thermal Shutdown 2.4 V Typical Undervoltage Lockout 1 ms Turn On (soft-start) and Fast Turn Off Active-High or Active-Low Enable Versions Improved Replacements for MIC2525-1 and MIC2525-2 USB Hosts and Self-Powered Hubs USB Bus-Powered Hubs Hot Plug-In Power Supplies Battery-Charger Circuits Applications 2525 AND 2535 USB POWER CONTROL SWITCHES FUNCTIONAL BLOCK DIAGRAM FLG A2535 ONLY GATE CONTROL EN CHARGE PUMP OUT CURRENT LIMIT OSC 1.2 V REF. TSD UVLO IN GND Dwg. FP-049 A2535EM ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS 2.5 2.0 GATE CONTROL EN FLG GND NC 1 2 3 4 8 7 OUT IN NC NC 1.5 SUFFIX 'M', RJA = 60C/W NC NC NC 6 5 1.0 0.5 SUFFIX 'L', RJA = 108C/W Dwg. PP-070-1A Note that the A2535EM (DIP) and the A2535EL (SOIC) are electrically identical and share a common terminal number assignment. 0 25 50 75 100 125 AMBIENT TEMPERATURE IN C 150 Dwg. GP-009-2 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1999, Allegro MicroSystems, Inc. 2525 AND 2535 USB POWER CONTROL SWITCHES Electrical Characteristics at TA = 25C, VIN = 5 V (unless otherwise noted). Limits Parameter Operating Voltage Range Switch Resistance Test Conditions VIN VIN = 5 V, IOUT = 500 mA VIN = 3.3 V, IOUT = 500 mA Output Leakage Current Maximum Load Current Short-Circuit Current Limit Current-Limit Threshold ENABLE Input Threshold Output enabled into load, VOUT = 4 V Ramped load applied to enabled output, VOUT 4 V Low-to-high transition High-to-low transition ENABLE Input Hysteresis ENABLE Input Current ENABLE Input Cap. Output Turn-On Delay Output Turn-On Rise Time Output Turn-Off Delay Output Turn-Off Fall Time Error Flag Output Resistance Error Flag Off Current Supply Current RL = 10, each output RL = 10 each output RL = 10 each output RL = 10 each output VIN = 5 V, IL = 10 mA VIN = 3.3 V, IL = 10 mA VFLG = 5 V Switch OFF (see note), OUT = open Switch ON (see note), OUT = open UVLO Threshold Increasing VIN Decreasing VIN Over-Temperature Shutdown Threshold Increasing TJ Decreasing TJ VEN = 0 V to 5.5 V Output disabled, VIN = 5 V, VOUT = 0 Min 2.7 - - - 500 0.5 - - 0.8 - - - - - - - - - - - - - - - - Typ - 100 100 - - - 1.6 2.1 1.9 0.2 0.01 1.0 0.5 1.0 1.0 1.0 10 15 0.01 0.75 110 2.5 2.3 165 155 Max 5.8 140 140 10 - 1.25 - 2.4 - - 1.0 - - - - - - - - 5.0 160 - - - - Units V m m A mA A A V V V A pF ms ms s s A A A V V C C Note -- OFF is 0.8 V and ON is 2.4 V (active high) for the A2525EL/EM. OFF is 2.4 V and ON is 0.8 V (active low) for the A2535EL/EM. 2525 AND 2535 USB POWER CONTROL SWITCHES FUNCTIONAL DESCRIPTION Power switch The power switch is an N-channel MOSFET with a maximum on-state resistance of 140 m (VIN = 5 V). Configured as a high-side switch, the power switch prevents current flow in either direction if disabled. The drain body diode is disconnected from the source when the switch is OFF allowing the output voltage to exceed the input voltage without causing current conduction. The power switch supplies a minimum of 500 mA per switch. Charge pump An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V. The charge pump is limited to 2.5 A to establish a controlled turn on time of typically 1 ms. Driver The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall times of the output voltage. The rise time is typically 1 ms. ENABLE (EN or EN) The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 5 A maximum when a logic high is present on EN (A2525) or a logic low is present (A2535). The proper logic level restores bias to the drive and control circuits and turns the power ON. The enable input is a compatible with both TTL and CMOS logic levels. Fault flag (FLG) This open drain output is asserted (active low) when an overcurrent or over temperature condition is encountered. The output will remain asserted until the overcurrent or over temperature condition is removed. Current sense A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant-current mode and holds the current constant while varying the voltage on the load. Thermal sense An internal thermal-sense circuit shuts off the power switch when the junction temperature rises to approximately 165C. Hysteresis is built into the thermal sense circuit. After the device has cooled approximately 10C, the switch turns back ON. The switch continues to cycle off and on until the fault is removed. Undervoltage lockout A voltage-sense circuit monitors the input voltage. When the input voltage is approximately 2 V, a control signal turns OFF the power switch. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 2525 AND 2535 USB POWER CONTROL SWITCHES APPLICATIONS INFORMATION Overcurrent A sense FET is employed for overcurrent conditions. Unlike current-sense resistors, sense FETs do not increase the series resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only if the fault is present long enough to activate thermal limiting. Three possible overload conditions can occur. In the first condition, the output has been shorted before the device is enabled or between VIN has been applied. The device senses the short and immediately switches into a constant-current output. In the second condition, the short occurs while the device is enabled. At the instant the short occurs, very high currents may flow for a short time before the current-limit circuit can react . After the current-limit circuit has tripped (reached the overcurrent trip threshold) the device switches into constantcurrent mode. In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is exceeded. The device is capable of delivering current up to the current-limit threshold without damage. Once the threshold has been reached, the device switches into its constant-current mode. Fault flag (FLG) The FLG open-drain output is asserted (active low) when an overcurrent or over-temperature condition is encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause momentary false over-current reporting from the inrush current flowing through the device, charging the downstream capacitor. An RC filter can be connected to the terminal to reduce false overcurrent reporting. Using low-ESR electrolytic capacitors on the output lowers the inrush current flow through the device during hotplug events by providing a low impedance energy source, thereby reducing erroneous overcurrent reporting. Power dissipation and junction temperature The low on-resistance of the n-channel MOSFET allows small surface-mount packages, such as an SOIC, to pass large currents. The thermal resistance of these packages are high compared to those of power packages; it is good design practice to check power dissipation and junction temperature. The first step is to find rDS(on) at the input voltage and operating temperature. Next, calculate the power dissipation using: PD = rDS(on) x I2 Finally, calculate the junction temperature: TJ = PD x RJA + TA where: TA = ambient temperature C RJA = thermal resistance (SOIC = 108C/W, DIP = 60C/W). Thermal protection Thermal protection prevents damage to the IC when heavyoverload or short-circuit faults are present for extended periods of time. The faults force these devices into constant-current mode, which causes the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across the switch is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high levels. The protection circuit senses the junction temperature of the switch and shuts it OFF. Hysteresis is built into the thermal sense circuit, and after the device has cooled approximately 20, the switch turns back ON. The switch continues to cycle in this manner until the load fault or input power is removed. Undervoltage lock-out (UVLO) An undervoltage lockout ensures that the power switch is in the OFF state at power up. Whenever the input voltage falls below approximately 2 V, the power switch will be quickly turned OFF. This facilitates the design of hot-insertion systems where it is not possible to turn OFF the power switch before input power is removed. The UVLO will also keep the switch from being turned ON until the power supply has reached at least 2 V, even if the switch is enabled. Upon reinsertion, the power switch will be turned ON, with a controlled rise time to reduce EMI and voltage overshoots. Power supply considerations A 0.1 F ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electrolytic capacitor on the output terminals is also desirable when the output load is heavy. The capacitor reduces power supply transients that may cause ringing on the input. Also, bypassing the output with a 0.01 F to 0.1 F ceramic capacitor improves the immunity of the device to short-circuit transients. Other It is recommended that terminals 6 and 8 be externally tied together to ensure interchangeability with similar devices. 2525 AND 2535 USB POWER CONTROL SWITCHES A2525EL and A2535EL Dimensions in Inches (for reference only) 8 0.0098 0.0075 0.1574 0.1497 0.2440 0.2284 0.050 0.016 0.020 0.013 1 0.1968 0.1890 0.050 BSC 0 TO 8 0.0688 0.0532 0.0040 MIN. Dwg. MA-007-8 in Dimensions in Millimeters (controlling dimensions) 8 0.25 0.19 6.20 5.80 4.00 3.80 1.27 0.40 0.51 0.33 1 5.00 4.80 1.27 BSC 0 TO 8 1.75 1.35 0.10 MIN. Dwg. MA-007-8 mm NOTES: 1. Lead spacing tolerance is non-cumulative. 2. Exact body and lead configuration at vendor's option within limits shown. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 2525 AND 2535 USB POWER CONTROL SWITCHES A2525EM and A2535EM Dimensions in Inches (controlling dimensions) 0.014 0.008 8 5 0.430 0.280 0.240 MAX 0.300 BSC 1 0.070 0.045 4 0.005 0.400 0.355 MIN 0.210 MAX 0.015 MIN 0.150 0.115 0.022 0.014 0.100 BSC Dwg. MA-001-8A in Dimensions in Millimeters (for reference only) 0.355 0.204 8 5 10.92 7.11 6.10 MAX 7.62 BSC 1 1.77 1.15 4 0.13 10.16 9.02 MIN 5.33 MAX 0.39 MIN 3.81 2.93 0.558 0.356 2.54 BSC Dwg. MA-001-8A mm NOTES: 1. 2. 3. 4. Leads 1, 4, 5, and 8 may be half leads at vendor's option. Lead thickness is measured at seating plane or below. Lead spacing tolerance is non-cumulative. Exact body and lead configuration at vendor's option within limits shown. 2525 AND 2535 USB POWER CONTROL SWITCHES Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 |
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